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Posted by bonbons on Wed 25th Aug 00:21
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  1. 2010-08-25 00:14:47.680498 +0200 [   15.640105] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  2. 2010-08-25 00:14:47.680511 +0200 [   15.640226] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  3. 2010-08-25 00:14:48.043403 +0200 [   16.003201] [drm:intel_update_fbc],  
  4. 2010-08-25 00:14:48.148688 +0200 [   16.108501] [drm:intel_update_fbc],  
  5. 2010-08-25 00:14:48.148952 +0200 [   16.108621] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]  
  6. 2010-08-25 00:14:48.149611 +0200 [   16.109413] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :  
  7. 2010-08-25 00:14:48.149875 +0200 [   16.109635] [drm:drm_mode_debug_printmodeline], Modeline 14:"1400x1050" 62 108000 1400 1448 1560 1640 1050 1051 1054 1065 0x48 0xa  
  8. 2010-08-25 00:14:48.150126 +0200 [   16.109870] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:10:VGA-1]  
  9. 2010-08-25 00:14:48.157437 +0200 [   16.116966] [drm:drm_crtc_helper_set_mode], [CRTC:3]  
  10. 2010-08-25 00:14:48.157700 +0200 [   16.117086] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  11. 2010-08-25 00:14:48.157707 +0200 [   16.117164] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  12. 2010-08-25 00:14:48.160685 +0200 [   16.120502] [drm:drm_crtc_mode_set], performing mode set [original mode, adjusted mode]  
  13. 2010-08-25 00:14:48.160948 +0200 [   16.120632] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  14. 2010-08-25 00:14:48.160961 +0200 [   16.120757] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  15. 2010-08-25 00:14:48.165632 +0200 [   16.125447] [drm:intel_crtc_mode_set], Mode for pipe A:  
  16. 2010-08-25 00:14:48.165896 +0200 [   16.125545] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  17. 2010-08-25 00:14:48.166324 +0200 [   16.126134] [drm:intel_pipe_set_base], No FB bound  
  18. 2010-08-25 00:14:48.166587 +0200 [   16.126233] [drm:drm_crtc_mode_set], [ENCODER:11:DAC-11] set [MODE:0:640x480]  
  19. 2010-08-25 00:14:48.166600 +0200 [   16.126347] [drm:intel_update_watermarks], plane A (pipe 0) clock: 31500  
  20. 2010-08-25 00:14:48.166824 +0200 [   16.126461] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) A: 42  
  21. 2010-08-25 00:14:48.166843 +0200 [   16.126573] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) B: 42  
  22. 2010-08-25 00:14:48.167073 +0200 [   16.126673] [drm:intel_calculate_wm], FIFO entries required for mode: 22  
  23. 2010-08-25 00:14:48.167090 +0200 [   16.126786] [drm:intel_calculate_wm], FIFO entries required for mode: 2  
  24. 2010-08-25 00:14:48.167100 +0200 [   16.126897] [drm:i9xx_update_wm], FIFO watermarks - A: 22, B: 2  
  25. 2010-08-25 00:14:48.167334 +0200 [   16.127009] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 22, B: 2, C: 2, SR 1  
  26. 2010-08-25 00:14:48.167573 +0200 [   16.127247] [drm:intel_update_fbc],  
  27. 2010-08-25 00:14:48.167589 +0200 [   16.127355] [drm:intel_wait_for_vblank], intel_wait_for_vblank() 1 ...  
  28. 2010-08-25 00:14:48.220250 +0200 [   16.180044] [drm:intel_wait_for_vblank], vblank wait timed out  
  29. 2010-08-25 00:14:48.220517 +0200 [   16.180183] [drm:intel_wait_for_vblank], intel_wait_for_vblank() 1 done  
  30. 2010-08-25 00:14:48.536638 +0200 [   16.496391] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  31. 2010-08-25 00:14:48.536888 +0200 [   16.496481] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  32. 2010-08-25 00:14:48.682556 +0200 [   16.642368] [drm:intel_update_fbc],  
  33. 2010-08-25 00:14:48.682820 +0200 [   16.642485] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:10:VGA-1] disconnected  
  34. 2010-08-25 00:14:48.682833 +0200 [   16.642620] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:DVI-I-1]  
  35. 2010-08-25 00:14:48.689427 +0200 [   16.649231] [drm:drm_crtc_helper_set_mode], [CRTC:3]  
  36. 2010-08-25 00:14:48.689693 +0200 [   16.649343] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  37. 2010-08-25 00:14:48.689699 +0200 [   16.649421] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  38. 2010-08-25 00:14:48.692658 +0200 [   16.652482] [drm:drm_crtc_mode_set], performing mode set [original mode, adjusted mode]  
  39. 2010-08-25 00:14:48.692921 +0200 [   16.652612] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  40. 2010-08-25 00:14:48.692934 +0200 [   16.652737] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  41. 2010-08-25 00:14:48.697611 +0200 [   16.657426] [drm:intel_crtc_mode_set], Mode for pipe A:  
  42. 2010-08-25 00:14:48.697876 +0200 [   16.657524] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  43. 2010-08-25 00:14:48.698297 +0200 [   16.658112] [drm:intel_pipe_set_base], No FB bound  
  44. 2010-08-25 00:14:48.698561 +0200 [   16.658211] [drm:drm_crtc_mode_set], [ENCODER:11:DAC-11] set [MODE:0:640x480]  
  45. 2010-08-25 00:14:48.698573 +0200 [   16.658325] [drm:intel_update_watermarks], plane A (pipe 0) clock: 31500  
  46. 2010-08-25 00:14:48.698797 +0200 [   16.658439] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) A: 42  
  47. 2010-08-25 00:14:48.698814 +0200 [   16.658551] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) B: 42  
  48. 2010-08-25 00:14:48.699047 +0200 [   16.658651] [drm:intel_calculate_wm], FIFO entries required for mode: 22  
  49. 2010-08-25 00:14:48.699064 +0200 [   16.658764] [drm:intel_calculate_wm], FIFO entries required for mode: 2  
  50. 2010-08-25 00:14:48.699074 +0200 [   16.658876] [drm:i9xx_update_wm], FIFO watermarks - A: 22, B: 2  
  51. 2010-08-25 00:14:48.699307 +0200 [   16.658987] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 22, B: 2, C: 2, SR 1  
  52. 2010-08-25 00:14:48.699547 +0200 [   16.659226] [drm:intel_update_fbc],  
  53. 2010-08-25 00:14:48.699568 +0200 [   16.659322] [drm:intel_wait_for_vblank], intel_wait_for_vblank() 2 ...  
  54. 2010-08-25 00:14:48.714028 +0200 [   16.673839] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:DVI-I-1] disconnected  
  55. 2010-08-25 00:14:48.714292 +0200 [   16.673976] [drm:drm_setup_crtcs],  
  56. 2010-08-25 00:14:48.714529 +0200 [   16.674133] [drm:drm_enable_connectors], connector 5 enabled? yes  
  57. 2010-08-25 00:14:48.714548 +0200 [   16.674246] [drm:drm_enable_connectors], connector 10 enabled? no  
  58. 2010-08-25 00:14:48.714558 +0200 [   16.674345] [drm:drm_enable_connectors], connector 12 enabled? no  
  59. 2010-08-25 00:14:48.714792 +0200 [   16.674457] [drm:drm_target_preferred], looking for cmdline mode on connector 5  
  60. 2010-08-25 00:14:48.714803 +0200 [   16.674597] [drm:drm_target_preferred], looking for preferred mode on connector 5  
  61. 2010-08-25 00:14:48.715039 +0200 [   16.674724] [drm:drm_target_preferred], found mode 1400x1050  
  62. 2010-08-25 00:14:48.715050 +0200 [   16.674822] [drm:drm_setup_crtcs], picking CRTCs for 2048x2048 config  
  63. 2010-08-25 00:14:48.715278 +0200 [   16.674936] [drm:drm_setup_crtcs], desired mode 1400x1050 set on crtc 4  
  64. 2010-08-25 00:14:48.727637 +0200 [   16.687444] [drm:intelfb_create], allocated 1400x1050 fb: 0x02000000, bo f694d600  
  65. 2010-08-25 00:14:48.728324 +0200 [   16.688118] fbcon: inteldrmfb (fb0) is primary device 

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