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Posted by bonbons on Tue 24th Aug 23:19 (modification of post by bonbons view diff)
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  1. Freezing boot:  
  2.  
  3. 2010-08-24 22:46:38.033422 +0200 [   15.650110] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  4. 2010-08-24 22:46:38.396550 +0200 [   16.013254] [drm:intel_update_fbc],  
  5. 2010-08-24 22:46:38.501887 +0200 [   16.118549] [drm:intel_update_fbc],  
  6. 2010-08-24 22:46:38.502150 +0200 [   16.118669] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]  
  7. 2010-08-24 22:46:38.502631 +0200 [   16.119269] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :  
  8. 2010-08-24 22:46:38.502894 +0200 [   16.119326] [drm:drm_mode_debug_printmodeline], Modeline 14:"1400x1050" 62 108000 1400 1448 1560 1640 1050 1051 1054 1065 0x48 0xa  
  9. 2010-08-24 22:46:38.503131 +0200 [   16.119391] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:10:VGA-1]  
  10. 2010-08-24 22:46:38.507575 +0200 [   16.124233] [drm:drm_crtc_helper_set_mode], [CRTC:3]  
  11. 2010-08-24 22:46:38.507837 +0200 [   16.124334] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  12. 2010-08-24 22:46:38.510702 +0200 [   16.127360] [drm:drm_crtc_mode_set], performing mode set [original mode, adjusted mode]  
  13. 2010-08-24 22:46:38.510965 +0200 [   16.127477] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  14. 2010-08-24 22:46:38.510978 +0200 [   16.127614] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  15. 2010-08-24 22:46:38.515716 +0200 [   16.132378] [drm:intel_crtc_mode_set], Mode for pipe A:  
  16. 2010-08-24 22:46:38.515979 +0200 [   16.132476] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  17. 2010-08-24 22:46:38.516407 +0200 [   16.133065] [drm:intel_pipe_set_base], No FB bound  
  18. 2010-08-24 22:46:38.516671 +0200 [   16.133163] [drm:drm_crtc_mode_set], [ENCODER:11:DAC-11] set [MODE:0:640x480]  
  19. 2010-08-24 22:46:38.516683 +0200 [   16.133277] [drm:intel_update_watermarks], plane A (pipe 0) clock: 31500  
  20. 2010-08-24 22:46:38.516907 +0200 [   16.133391] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) A: 42  
  21. 2010-08-24 22:46:38.516925 +0200 [   16.133503] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) B: 42  
  22. 2010-08-24 22:46:38.517157 +0200 [   16.133615] [drm:intel_calculate_wm], FIFO entries required for mode: 22  
  23. 2010-08-24 22:46:38.517175 +0200 [   16.133715] [drm:intel_calculate_wm], FIFO entries required for mode: 2  
  24. 2010-08-24 22:46:38.517185 +0200 [   16.133827] [drm:i9xx_update_wm], FIFO watermarks - A: 22, B: 2  
  25. 2010-08-24 22:46:38.517418 +0200 [   16.133939] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 22, B: 2, C: 2, SR 1  
  26. 2010-08-24 22:46:38.517660 +0200 [   16.134177] [drm:intel_update_fbc],  
  27. 2010-08-24 22:46:38.573416 +0200 [   16.190036] [drm:intel_wait_for_vblank], vblank wait timed out  
  28. 2010-08-24 22:46:38.892840 +0200 [   16.509308] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  29. 2010-08-24 22:46:38.996631 +0200 [   16.613056] [drm:intel_update_fbc],  
  30. 2010-08-24 22:46:38.996899 +0200 [   16.613153] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:10:VGA-1] disconnected  
  31. 2010-08-24 22:46:38.996911 +0200 [   16.613285] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:DVI-I-1]  
  32. 2010-08-24 22:46:39.001524 +0200 [   16.617940] [drm:drm_crtc_helper_set_mode], [CRTC:3]  
  33. 2010-08-24 22:46:39.001790 +0200 [   16.618040] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  34. 2010-08-24 22:46:39.004660 +0200 [   16.621083] [drm:drm_crtc_mode_set], performing mode set [original mode, adjusted mode]  
  35. 2010-08-24 22:46:39.004923 +0200 [   16.621201] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  36. 2010-08-24 22:46:39.004935 +0200 [   16.621337] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  37. 2010-08-24 22:46:39.009621 +0200 [   16.626039] [drm:intel_crtc_mode_set], Mode for pipe A:  
  38. 2010-08-24 22:46:39.009885 +0200 [   16.626137] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  39. 2010-08-24 22:46:39.010313 +0200 [   16.626725] [drm:intel_pipe_set_base], No FB bound  
  40. 2010-08-24 22:46:39.010575 +0200 [   16.626822] [drm:drm_crtc_mode_set], [ENCODER:11:DAC-11] set [MODE:0:640x480]  
  41. 2010-08-24 22:46:39.010588 +0200 [   16.626935] [drm:intel_update_watermarks], plane A (pipe 0) clock: 31500  
  42. 2010-08-24 22:46:39.010812 +0200 [   16.627048] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) A: 42  
  43. 2010-08-24 22:46:39.010829 +0200 [   16.627159] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) B: 42  
  44. 2010-08-24 22:46:39.011062 +0200 [   16.627259] [drm:intel_calculate_wm], FIFO entries required for mode: 22  
  45. 2010-08-24 22:46:39.011078 +0200 [   16.627372] [drm:intel_calculate_wm], FIFO entries required for mode: 2  
  46. 2010-08-24 22:46:39.011088 +0200 [   16.627484] [drm:i9xx_update_wm], FIFO watermarks - A: 22, B: 2  
  47. 2010-08-24 22:46:39.011323 +0200 [   16.627595] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 22, B: 2, C: 2, SR 1  
  48. 2010-08-24 22:46:39.011563 +0200 [   16.627833] [drm:intel_update_fbc],  
  49. 2010-08-24 22:46:39.025153 +0200 [   16.641556] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:DVI-I-1] disconnected  
  50. 2010-08-24 22:46:39.025419 +0200 [   16.641688] [drm:drm_setup_crtcs],  
  51. 2010-08-24 22:46:39.025653 +0200 [   16.641852] [drm:drm_enable_connectors], connector 5 enabled? yes  
  52. 2010-08-24 22:46:39.025673 +0200 [   16.641965] [drm:drm_enable_connectors], connector 10 enabled? no  
  53. 2010-08-24 22:46:39.025684 +0200 [   16.642064] [drm:drm_enable_connectors], connector 12 enabled? no  
  54. 2010-08-24 22:46:39.025914 +0200 [   16.642176] [drm:drm_target_preferred], looking for cmdline mode on connector 5  
  55. 2010-08-24 22:46:39.025926 +0200 [   16.642316] [drm:drm_target_preferred], looking for preferred mode on connector 5  
  56. 2010-08-24 22:46:39.026163 +0200 [   16.642443] [drm:drm_target_preferred], found mode 1400x1050  
  57. 2010-08-24 22:46:39.026174 +0200 [   16.642541] [drm:drm_setup_crtcs], picking CRTCs for 2048x2048 config  
  58. 2010-08-24 22:46:39.026403 +0200 [   16.642655] [drm:drm_setup_crtcs], desired mode 1400x1050 set on crtc 4  
  59. 2010-08-24 22:46:39.039333 +0200 [   16.655715] [drm:intelfb_create], allocated 1400x1050 fb: 0x02000000, bo f651f780  
  60. 2010-08-24 22:46:39.040021 +0200 [   16.656401] fbcon: inteldrmfb (fb0) is primary device  
  61.  
  62.  
  63. Successful startup, thqt is with  
  64.                 if (wait_for((I915_READ(pipestat_reg) &  
  65.                       PIPE_VBLANK_INTERRUPT_STATUS) == 0,  
  66.                     50, 0))  
  67.  
  68. 2010-08-24 22:56:38.587376 +0200 [   15.640106] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  69. 2010-08-24 22:56:38.587390 +0200 [   15.640228] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  70. 2010-08-24 22:56:38.950213 +0200 [   16.003149] [drm:intel_update_fbc],  
  71. 2010-08-24 22:56:39.055482 +0200 [   16.108412] [drm:intel_update_fbc],  
  72. 2010-08-24 22:56:39.055743 +0200 [   16.108531] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]  
  73. 2010-08-24 22:56:39.056380 +0200 [   16.109047] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :  
  74. 2010-08-24 22:56:39.057305 +0200 [   16.109181] [drm:drm_mode_debug_printmodeline], Modeline 14:"1400x1050" 62 108000 1400 1448 1560 1640 1050 1051 1054 1065 0x48 0xa  
  75. 2010-08-24 22:56:39.057317 +0200 [   16.109328] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:10:VGA-1]  
  76. 2010-08-24 22:56:39.064051 +0200 [   16.116971] [drm:drm_crtc_helper_set_mode], [CRTC:3]  
  77. 2010-08-24 22:56:39.064315 +0200 [   16.117095] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  78. 2010-08-24 22:56:39.064322 +0200 [   16.117173] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  79. 2010-08-24 22:56:39.067307 +0200 [   16.120248] [drm:drm_crtc_mode_set], performing mode set [original mode, adjusted mode]  
  80. 2010-08-24 22:56:39.067568 +0200 [   16.120377] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  81. 2010-08-24 22:56:39.067580 +0200 [   16.120502] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  82. 2010-08-24 22:56:39.072258 +0200 [   16.125194] [drm:intel_crtc_mode_set], Mode for pipe A:  
  83. 2010-08-24 22:56:39.072521 +0200 [   16.125292] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  84. 2010-08-24 22:56:39.072944 +0200 [   16.125881] [drm:intel_pipe_set_base], No FB bound  
  85. 2010-08-24 22:56:39.073207 +0200 [   16.125980] [drm:drm_crtc_mode_set], [ENCODER:11:DAC-11] set [MODE:0:640x480]  
  86. 2010-08-24 22:56:39.073220 +0200 [   16.126094] [drm:intel_update_watermarks], plane A (pipe 0) clock: 31500  
  87. 2010-08-24 22:56:39.073443 +0200 [   16.126208] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) A: 42  
  88. 2010-08-24 22:56:39.073461 +0200 [   16.126319] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) B: 42  
  89. 2010-08-24 22:56:39.073693 +0200 [   16.126419] [drm:intel_calculate_wm], FIFO entries required for mode: 22  
  90. 2010-08-24 22:56:39.073709 +0200 [   16.126531] [drm:intel_calculate_wm], FIFO entries required for mode: 2  
  91. 2010-08-24 22:56:39.073720 +0200 [   16.126643] [drm:i9xx_update_wm], FIFO watermarks - A: 22, B: 2  
  92. 2010-08-24 22:56:39.073962 +0200 [   16.126754] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 22, B: 2, C: 2, SR 1  
  93. 2010-08-24 22:56:39.074193 +0200 [   16.126993] [drm:intel_update_fbc],  
  94. 2010-08-24 22:56:39.450675 +0200 [   16.503552] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  95. 2010-08-24 22:56:39.450926 +0200 [   16.503641] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  96. 2010-08-24 22:56:39.560329 +0200 [   16.613262] [drm:intel_update_fbc],  
  97. 2010-08-24 22:56:39.560595 +0200 [   16.613379] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:10:VGA-1] disconnected  
  98. 2010-08-24 22:56:39.560608 +0200 [   16.613514] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:DVI-I-1]  
  99. 2010-08-24 22:56:39.568684 +0200 [   16.621613] [drm:drm_crtc_helper_set_mode], [CRTC:3]  
  100. 2010-08-24 22:56:39.568946 +0200 [   16.621737] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  101. 2010-08-24 22:56:39.568953 +0200 [   16.621815] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  102. 2010-08-24 22:56:39.571913 +0200 [   16.624856] [drm:drm_crtc_mode_set], performing mode set [original mode, adjusted mode]  
  103. 2010-08-24 22:56:39.572176 +0200 [   16.624985] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  104. 2010-08-24 22:56:39.572188 +0200 [   16.625120] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  105. 2010-08-24 22:56:39.576862 +0200 [   16.629797] [drm:intel_crtc_mode_set], Mode for pipe A:  
  106. 2010-08-24 22:56:39.577123 +0200 [   16.629895] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa  
  107. 2010-08-24 22:56:39.577557 +0200 [   16.630503] [drm:intel_pipe_set_base], No FB bound  
  108. 2010-08-24 22:56:39.577820 +0200 [   16.630603] [drm:drm_crtc_mode_set], [ENCODER:11:DAC-11] set [MODE:0:640x480]  
  109. 2010-08-24 22:56:39.577833 +0200 [   16.630717] [drm:intel_update_watermarks], plane A (pipe 0) clock: 31500  
  110. 2010-08-24 22:56:39.578057 +0200 [   16.630830] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) A: 42  
  111. 2010-08-24 22:56:39.578075 +0200 [   16.630942] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) B: 42  
  112. 2010-08-24 22:56:39.578306 +0200 [   16.631042] [drm:intel_calculate_wm], FIFO entries required for mode: 22  
  113. 2010-08-24 22:56:39.578324 +0200 [   16.631155] [drm:intel_calculate_wm], FIFO entries required for mode: 2  
  114. 2010-08-24 22:56:39.578334 +0200 [   16.631267] [drm:i9xx_update_wm], FIFO watermarks - A: 22, B: 2  
  115. 2010-08-24 22:56:39.578567 +0200 [   16.631378] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 22, B: 2, C: 2, SR 1  
  116. 2010-08-24 22:56:39.578807 +0200 [   16.631617] [drm:intel_update_fbc],  
  117. 2010-08-24 22:56:39.983348 +0200 [   17.036218] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  118. 2010-08-24 22:56:39.983374 +0200 [   17.036311] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  119. 2010-08-24 22:56:39.998636 +0200 [   17.051567] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:DVI-I-1] disconnected  
  120. 2010-08-24 22:56:39.998897 +0200 [   17.051703] [drm:drm_setup_crtcs],  
  121. 2010-08-24 22:56:39.998909 +0200 [   17.051800] [drm:drm_enable_connectors], connector 5 enabled? yes  
  122. 2010-08-24 22:56:39.999132 +0200 [   17.051912] [drm:drm_enable_connectors], connector 10 enabled? no  
  123. 2010-08-24 22:56:39.999149 +0200 [   17.052022] [drm:drm_enable_connectors], connector 12 enabled? no  
  124. 2010-08-24 22:56:39.999382 +0200 [   17.052133] [drm:drm_target_preferred], looking for cmdline mode on connector 5  
  125. 2010-08-24 22:56:39.999400 +0200 [   17.052261] [drm:drm_target_preferred], looking for preferred mode on connector 5  
  126. 2010-08-24 22:56:39.999631 +0200 [   17.052389] [drm:drm_target_preferred], found mode 1400x1050  
  127. 2010-08-24 22:56:39.999647 +0200 [   17.052487] [drm:drm_setup_crtcs], picking CRTCs for 2048x2048 config  
  128. 2010-08-24 22:56:39.999656 +0200 [   17.052600] [drm:drm_setup_crtcs], desired mode 1400x1050 set on crtc 4  
  129. 2010-08-24 22:56:40.012923 +0200 [   17.065856] [drm:intelfb_create], allocated 1400x1050 fb: 0x02000000, bo f692e9c0  
  130. 2010-08-24 22:56:40.013613 +0200 [   17.066538] fbcon: inteldrmfb (fb0) is primary device  
  131. 2010-08-24 22:56:40.154510 +0200 [   17.170554] [drm:intel_update_fbc],  
  132. 2010-08-24 22:56:40.154760 +0200 [   17.170684] [drm:drm_crtc_helper_set_config],  
  133. 2010-08-24 22:56:40.154776 +0200 [   17.170687] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:16] #connectors=0 (x y) (0 0)  
  134. 2010-08-24 22:56:40.154783 +0200 [   17.170697] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set  
  135. 2010-08-24 22:56:40.155009 +0200 [   17.170703] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  136. 2010-08-24 22:56:40.155021 +0200 [   17.170706] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  137. 2010-08-24 22:56:40.155026 +0200 [   17.173831] [drm:drm_crtc_helper_set_config],  
  138. 2010-08-24 22:56:40.155031 +0200 [   17.173833] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:16] #connectors=1 (x y) (0 0)  
  139. 2010-08-24 22:56:40.155036 +0200 [   17.174302] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set  
  140. 2010-08-24 22:56:40.155259 +0200 [   17.174305] [drm:drm_crtc_helper_set_config], modes are different, full mode set  
  141. 2010-08-24 22:56:40.155271 +0200 [   17.174308] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0  
  142. 2010-08-24 22:56:40.155508 +0200 [   17.174314] [drm:drm_mode_debug_printmodeline], Modeline 15:"1400x1050" 62 108000 1400 1448 1560 1640 1050 1051 1054 1065 0x48 0xa  
  143. 2010-08-24 22:56:40.155519 +0200 [   17.174321] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch  
  144. 2010-08-24 22:56:40.155525 +0200 [   17.174324] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch  
  145. 2010-08-24 22:56:40.155530 +0200 [   17.174328] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]  
  146. 2010-08-24 22:56:40.155535 +0200 [   17.174331] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace  
  147. 2010-08-24 22:56:40.155758 +0200 [   17.174334] [drm:drm_mode_debug_printmodeline], Modeline 15:"1400x1050" 62 108000 1400 1448 1560 1640 1050 1051 1054 1065 0x48 0xa  
  148. 2010-08-24 22:56:40.155770 +0200 [   17.174345] [drm:drm_crtc_helper_set_mode], [CRTC:4]  
  149. 2010-08-24 22:56:40.155775 +0200 [   17.174366] [drm:intel_panel_get_backlight], get backlight PWM = 0  
  150. 2010-08-24 22:56:40.156008 +0200 [   17.174370] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  151. 2010-08-24 22:56:40.156019 +0200 [   17.174372] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  152. 2010-08-24 22:56:40.156025 +0200 [   17.177763] [drm:drm_crtc_mode_set], performing mode set [original mode, adjusted mode]  
  153. 2010-08-24 22:56:40.156258 +0200 [   17.177766] [drm:drm_mode_debug_printmodeline], Modeline 15:"1400x1050" 62 108000 1400 1448 1560 1640 1050 1051 1054 1065 0x48 0xa  
  154. 2010-08-24 22:56:40.156269 +0200 [   17.177772] [drm:drm_mode_debug_printmodeline], Modeline 17:"1400x1050" 62 108000 1400 1416 1528 1688 1050 1051 1054 1066 0x48 0xa  
  155. 2010-08-24 22:56:40.156275 +0200 [   17.178568] [drm:intel_crtc_mode_set], Mode for pipe B:  
  156. 2010-08-24 22:56:40.156508 +0200 [   17.178570] [drm:drm_mode_debug_printmodeline], Modeline 15:"1400x1050" 62 108000 1400 1448 1560 1640 1050 1051 1054 1065 0x48 0xa  
  157. 2010-08-24 22:56:40.156519 +0200 [   17.179033] [drm:intel_pipe_set_base_atomic], Writing base 02000000 00000000 0 0 5632  
  158. 2010-08-24 22:56:40.156525 +0200 [   17.179037] [drm:intel_update_fbc],  
  159. 2010-08-24 22:56:40.156530 +0200 [   17.179041] [drm:drm_crtc_mode_set], [ENCODER:6:LVDS-6] set [MODE:15:1400x1050]  
  160. 2010-08-24 22:56:40.157299 +0200 [   17.179045] [drm:intel_update_watermarks], plane B (pipe 1) clock: 108000  
  161. 2010-08-24 22:56:40.157312 +0200 [   17.179050] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) A: 42  
  162. 2010-08-24 22:56:40.157318 +0200 [   17.179053] [drm:i85x_get_fifo_size], FIFO size - (0x00015455) B: 42  
  163. 2010-08-24 22:56:40.157323 +0200 [   17.179056] [drm:intel_calculate_wm], FIFO entries required for mode: 2  
  164. 2010-08-24 22:56:40.157328 +0200 [   17.179059] [drm:intel_calculate_wm], FIFO entries required for mode: 70  
  165. 2010-08-24 22:56:40.157332 +0200 [   17.179063] [drm:intel_calculate_wm] *ERROR* Insufficient FIFO for plane, expect flickering: entries required = 70, available = 42.  
  166. 2010-08-24 22:56:40.157337 +0200 [   17.179066] [drm:i9xx_update_wm], FIFO watermarks - A: 2, B: 41  
  167. 2010-08-24 22:56:40.157342 +0200 [   17.179069] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 2, B: 41, C: 2, SR 1  
  168. 2010-08-24 22:56:40.157346 +0200 [   17.179108] [drm:intel_update_fbc],  
  169. 2010-08-24 22:56:40.157351 +0200 [   17.179112] [drm:intel_panel_get_max_backlight] *ERROR* max backlight PWM is zero (adjusted to 1), needs fixing!  
  170. 2010-08-24 22:56:40.157355 +0200 [   17.179114] [drm:intel_panel_set_backlight], set backlight PWM = 0  
  171. 2010-08-24 22:56:40.160438 +0200 [   17.182831] [drm:drm_crtc_helper_set_config],  
  172. 2010-08-24 22:56:40.163695 +0200 [   17.182833] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:16] #connectors=1 (x y) (0 0)  
  173. 2010-08-24 22:56:40.166944 +0200 [   17.182840] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]  
  174. 2010-08-24 22:56:40.170124 +0200 [   17.190760] [drm:drm_crtc_helper_set_config],  
  175. 2010-08-24 22:56:40.173365 +0200 [   17.190762] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:16] #connectors=1 (x y) (0 0)  
  176. 2010-08-24 22:56:40.176567 +0200 [   17.190769] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]  
  177. 2010-08-24 22:56:40.179763 +0200 [   17.199568] Console: switching to colour frame buffer device 175x65  
  178. 2010-08-24 22:56:40.182929 +0200 [   17.199586] [drm:drm_crtc_helper_set_config],  
  179. 2010-08-24 22:56:40.186135 +0200 [   17.199589] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:16] #connectors=1 (x y) (0 0)  
  180. 2010-08-24 22:56:40.189298 +0200 [   17.199599] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]  
  181. 2010-08-24 22:56:40.192571 +0200 [   17.242387] fb0: inteldrmfb frame buffer device  
  182. 2010-08-24 22:56:40.195739 +0200 [   17.245561] drm: registered panic notifier 

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